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Ordering number : ENA1159
Bi-CMOS IC
LV5050NV
Overview
DC / DC Converter Controller
The LV5050NV is a high efficiency DC/DC converter controller IC adopting a synchronous rectifying system. Incorporating numerous functions on a single chip with easy external setting, it can be used for a wide variety of applications. This device is optimal for use in internal power supply systems which are used in electronic devices, LCD-TVs, DVD recorders, etc.
Functions
* Step-down DC/DC converter controller with 1-channel * Input UVLO circuit, * Built-in over current detection function * Built-in soft-start/soft-stop function * Built-in start-up delay circuit * Built-in output voltage monitor function (Under voltage protection with power good and timer latch) * Synchronized operation is possible between different devices.
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Supply voltage Allowable power dissipation Junction temperature Operating temperature Storage temperature Symbol VIN Pd max Tj Topr Tstg * Conditions Ratings 18 800 150 -20 to 85 -55 to +150 Unit V mW C C C
*: Mounted on a specified: 114.3mm x 76.1mm x1.6 mm, glass epoxy board.
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Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
40208 MS 20080356-S00007 No.A1159-1/7
LV5050NV
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Parameter Allowable terminal voltage *2 1 2 3 4 5 HDRV,CBOOT Between HDRV, CBOOT and SW VIN, ILIM, RSNS, SW, PGOOD VLIN5, VDD, LDRV COMP, FB, SS, UV_DELAY TD, CT, CLKO *2: The Allowable Terminal Voltage, the SGND+PGND pin becomes a standard except for No.2 of the allowable terminal voltage about No.2 of the allowable terminal voltage, the SW pin becomes a standard. 18 6.5 VLIN5+0.3 V V V 28 6.5 V V Symbol Conditions Ratings Unit
Recommended Operating Condition at Ta = 25C
Parameter Supply voltage Supply voltage Symbol VIN VIN Conditions VIN and VLIN5 pins opens VIN and VLIN5 pins shorted Ratings 7.5 to 16 4.5 to 6.0 Unit V V
Electrical Characteristics at Ta = 25C, VIN=12V, Unless especially specified
Parameter System Reference voltage for comparing Supply current 1 Supply current 2 5V supply voltage Over-current sense comparator offset Over-current sense reference current source Leading edge pulse blank time Soft start source current Soft start sink current Soft start clamp voltage UV_DELAY source current UV_DELAY sink current UV_DELAY threshold voltage UV_DELAY operating voltage VUVP detection hysteresis Output discharge transistor ON resistance Output part CBOOT leakage current HDRV LDRV source current HDRV LDRV sink current HDRV lower ON resistance LDRV lower ON resistance Synchronous ON prevention dead time 1 Synchronous ON prevention dead time 2 ICBOOT ISCDRV ISKDRV RHDRV RLDRV Tdead1 Tdead2 IOUT=500mA IOUT=500mA LDRV OFFHDRV ON HDRV OFFLDRV ON VCBOOT=VSW + 6.5V 0.5 0.5 0.5 0.5 50 70 1.0 1.0 1.5 1.5 70 120 3.0 3.0 120 280 10 A A A ns ns TLEPB ISSSC ISSSK VSST0 ISCUVD ISKUVD VUVD VUVP VUVP VSWON 5 100% at VFB=VREF TD=5V TD=0V When the voltage of the SS pin operating UV_DELAY=2V UV_DELAY=2V -2.0 0.5 1.2 -6.1 0.5 1.9 87 120 -3.5 2.0 1.6 -8.6 2 2.4 92 1.5 10 20 3.0 97 2.0 -12.0 150 -5.0 A mA V A mA V % % VREF ICC1 ICC2 VLIN5 VCLOS ICL VIN=10 to 14V TD=5V (Except for the Ciss charge) TD=0V IVIN5=0 to 10mA 0.3 4.75 -5 7.47 8.30 0.818 0.826 2 0.6 5.00 0.834 4 1.2 5.25 +5 9.13 V mA mA V mV A Symbol Conditions min Ratings typ max Unit
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No.A1159-2/7
LV5050NV
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Parameter Oscillator Oscillation freaquency Oscillation frequency range Maximum ON duty Minimum ON time Upper-side voltage saw- tooth wave Lower-side voltage saw-tooth wave Error Amplifier Error amplifier input current COMP pin source current COMP pin sink current Error amplifier gm Logic output Power Good low level source current Power Good high level leakage current Power Good operation voltage TP pin threshold voltage TP pin high impedance voltage TD pin charge source current TD pin discharge sink current CLKO high level voltage CLKO low level voltage Protection function VIN UVLO release voltage UVLO Hysteresis UVLO released input voltage VUVLO VUVLO VINVUVLO 4.8 3.5 4.1 0.4 5.5 6.3 4.3 mA A IpwrgdL IpwrgdH Vpwrgd VONTD VTDH ITDSC ITDSK VCLKOH VCLKOL ICLK10=1mA ICLK10=1mA VPGOOD=0.4V VPGOOD=12V 100% at VFB=VREF When the voltage of the TD pin rises When VIN and VLIN5 pins are set to open 87 1.5 4.5 -2.0 0.2 0.7V5LIN 0.3V5LIN 92 2.4 5.0 -3.5 1.0 0.5 1.0 10 97 3.5 5.5 -5.0 mA A % V V A mA V V IFB ICOMPSC ICOMPSK gm -190 -150 18 500 -100 -100 100 700 -50 -50 150 900 nA A A umho fosc foscop DON max TON min VsawH VsawL CT=130pF CT=130pF fOSC=300kHz fOSC=300kHz 1.5 0.8 CT=130pF 280 250 83 90 100 2 1 2.6 1.2 330 380 1100 79 kHz kHz % ns V V Symbol Conditions min Ratings typ max Unit
No.A1159-3/7
LV5050NV
Package Dimensions
unit : mm (typ) 3179C
1000
Pd max - Ta
Specified board: 114.3x76.1x1.6mm3 glass epoxy board
6.5 20 11
Allowable power dissipation, Pd max -- mW
800
4.4
6.4
600
0.5
400
416
1 0.65 (0.33)
10 0.22
1.5max
0.15
200
(1.3)
0 -20
0
20
40
60
80 85
100
Ambient temperature, Ta -- C
0.1
SANYO : SSOP20(225mil)
Pin Assignment
SW 1 HDRV 2 CBOOT 3
20 PGND 19 LDRV 18 VDD
LV5050NV
VLIN5 4 RSNS 5 (NC) 6 ILIM 7 TD 8 SS 9 VIN 10
17 SGND 16 COMP 15 FB 14 UV_DELAY 13 PGOOD 12 CT 11 CLKO
Top view
No.A1159-4/7
VIN
Input Power Supply
BG POR VLIN5 IREF Current bias Vref 0.8V Internal Bias 4.2V / 3.8V Vref 5V REG (Allways ON) BG refrrence
Block Diagram
Voltage and Current generator
8.6A ILIM Comp ILIM
COMP
CH1 Output ISENSE Amp PWM comp Shifter & latch R S Q Q PWM logic SKIP control
RSNS
FB
error amp
CBOOT
UV
0.87Vref
HDRV SW CH1 Output
Vref
3.5A Corrective ramp SSEND SD
1.6V
LV5050NV
SS
SD
Shoot through protection sequencer VDD
0 deg
LDRV
3.5A
TD CONT1 CONT POR 8.6A R S 2.4V UV_timeout
POR
Active discharge Rdson= 15
PGND
2.4V
Q Q 0 deg OSC 300kHz
UV
SSEND
PGOOD
UV_DELAY
CT
SGND CLKO SYNC. pulse out 5V 0V
No.A1159-5/7
LV5050NV
Pin Functions
Pin No. 1 SW Pin name Description This Pin is connected with the switching node. A source of an external upper side MOSFET and a drain of an external lower side MOSFET are connected with this pin. This pin becomes the return current path of the HDRV pin. This pin is connected with a transistor drain of the discharge MOSFET for SOFT STOP in the IC (typical 15). Also, this pin has the signal output part for the short through prevention of both the upper and lower MOSFETs. When this terminal voltage becomes 1V or less for PGND, the LDRV pin is turned on. 2 3 HDRV CBOOT The gate drive pin for an external upper side MOSFET. The bootstrap capacity connection pin. The gate drive power of upper MOSFET is provided by this pin. This pin is connected to the VDD pin through a diode and is connected to the SW pin through the bootstrap capacity. 4 VLIN5 The output pin of an internal regulator of 5V. the current is provided by the VIN pin. Also, power supply of the control circuit in the IC is provided by this pin. Connect an output capacitor of 4.7F between this pin and SGND. A regulator of 5V operates, even if the IC is in the standby state. This pin is monitored by an UVLO function and the IC starts by the voltage of 4.0V or more (the IC is off by the voltage of 3.8V or less.) 5 RSNS The input pin of the over current detection comparator / the current detection amplifier To detect resistance, this pin is connected to the under side of a resistor for the current detection between the VIN pin and the DRAIN of the upper MOSFET. Also, to use the ON resistance of MOSFET for the current detection, connect this pin to the SOURCE of the upper MOSFET. To prevent the common impedance of main current to the detection-voltage, this pin is connected by independent wiring. 6 7 NC ILIM No connection. The pin to set the trip point for over current detection. Since the SINK current source of 8.3A (ILIM) is connected in the IC, the over-current detection voltage (ILIM x RLIM) is generated by connecting a resistor RLIM between this pin and the VIN pin. The over-current is detected by comparing the voltage between the VIN pin and the ILIM pin to the current detection resistance RSNS or both end voltage of the upper MOSFET. 8 TD Start-up delay pin. The time until the IC starts after releasing POR is set by connecting a capacitor between this pin and SGND. After releasing POR, an external capacitor is charged up by the constant current source of 3.5A in the IC. When this terminal voltage becomes 2.4V or more, The IC starts. Also, when this terminal voltage becomes 2.4V or less, The IC becomes the standby state. If external capacitor is not connected, the IC instantly starts after releasing POR. 9 SS The pin to connect a capacitor for soft start. After releasing POR, when the voltage of the TD pin becomes 2.4V or more, the SS pin is charged by an internal constant current source of 3.5A. Since this pin is connected to the positive input of the transformer conductance amplifier, the ramp-up wave form of the SS pin becomes the ramp-up wave form of the output. During POR operations and after the UV_DELAY time-out, the SS pin is discharged 10 11 VIN CLKO Power supply pin of the IC The clock output pin. The clock that synchronized to the oscillation waveform of the CT pin is output. To synchronize two or more LV5050NVs, the CLKO pin of the device that becomes a master is connected to the CT pin of the device that becomes a slave. When two or more the devices are synchronized and the start-up timing is changed by using the Td pin between each device, the earliest start-up device is determined as the master. 12 CT The pin to connect an external capacitor for the oscillator. Connect a capacitor between this pin and SGND. When a capacitor of 130pF is connected between this pin and GND, the oscillation frequency can be set up by 330kHz. Also, this pin is applied by an external clock signal. The PWM operation is performed by the frequency of applied clock signal. When an external clock signal is applied, the rectangular wave of 0V in low level and from 3.3V to 5V in high level is applied. The rectangular wave source needs the fan-out of 1mA or more. 13 PGOOD The power good pin. The open drain MOSFET of the withstand of 28V is connected in the IC. When the output voltage of channel 1 is less than -13% for the setup voltage, the low level is output. This pin has hysteresis of about (VREF x 1.5%).
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No.A1159-6/7
LV5050NV
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Pin No. 14 Pin name UV_DELAY UVP DELAY pin By connecting a capacitor between this pin and SGND, the time until the IC latches off after detecting the UVP state can be set. Also, after channel 1 terminated the soft-start function, when the output voltage becomes -80% or less for the setup voltage, an external capacitor is charged by the constant current source of 8.6A in the IC. When this terminal voltage becomes 2.4V or more, the IC is latched off. If an external capacitor is not connected, the IC is instantly latched off after detecting the UVP state. Also, when this pin is shorted to GND, the UV_DELAY function is not operated. 15 FB Feed back input pin. The minus terminal (-) of the trans conductance amplifier is connected. The voltage generated when the output voltage was divided by a resistor is input into this pin. The converter operates so that this pin becomes an internal reference voltage (VREF=0.836V). Also, this pin is monitored by the comparators UVP and OVP. When the voltage of this pin becomes less than 87% of the set voltage, the PGOOD pin is low level. A timer of the UV_DELAY function operates. Also, when the voltage of this pin becomes more than 117% of the set voltage, the IC latches off. 16 COMP The pin to connect a capacitor and a resistor for phase compensation. The output of an internal transformer conductance amplifier is connected. Connect an external phase compensation circuit between this pin and SGND. 17 18 19 SGND VDD LDRV The system ground of the IC. The reference voltage is generated based on this pin. This pin is connected to the power supply system ground. Power supply pin for the gate drive of an external lower-side MOSFET. This pin is connected to the VLIN5 pin through a filter. The gate drive pin of an external lower-side MOSFET. This pin has the signal input part for prevention of short-through of both the upper and lower MOSFETs. When the voltage of this pin becomes less than 1V, the HDRV pin is turned on. 20 PGND Power ground pin. This pin becomes the return current path of the LDRV pin. Description
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This catalog provides information as of April, 2008. Specifications and information herein are subject to change without notice. PS No.A1159-7/7

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